Method for determining excess carrier lifetime in semiconductor devices

ABSTRACT

Described is a method for excess carrier lifetime testing of semiconductor materials by the use of ultrasonically soldered contacts in obtaining open-circuit voltage decay measurements. The method is particularly adapted for use in in-line production testing of semiconductor wafers and does not require the use of high temperatures to bond contacts to the wafer being tested.

United States Patent Mazur [451 Oct. 10,1972

[54] METHOD FOR DETERMINING EXCESS CARRIER LIFETIME IN SEMICONDUCTORDEVICES [72] Inventor: Robert G. Mazur, Monroeville, Pa.

[73] Assignee: Westinghouse Electric Corporation,

Pittsburgh, Pa.

[22] Filed: May 28, 1969 [21] App]. No.: 828,621

[52] US. Cl ..324/l58 D, 29/470.1, 228/1 [51] Int. Cl. ..G0lr 31/22,323k 21/00 [58] Field of Search.324/158, 158 D, 158 T; 29/5'73,

[56] References Cited UNITED STATES PATENTS 3,250,693 5/1966 Amaya..324/158 3,366,879 l/l968 Kobayashi et al. ..324/158 3,384,283 5/1968Mims ..29/470.l X 3,459,355 8/1969 Metzger, Jr ..228/l OTHERPUBLICATIONS Howard, N. R., J. Sci. Instrum. vol. 39, 1962, pages IKiver, M. S., Transistors, McGraw Hill, N.Y., 3rd ed., 1962, pages la,2a, 64, 65.

Lederhandler et al., Measurement of Minority Proc. of the IRE, vol. 43,April 1955, pages 477- 483.

Primary ExaminerRudolph V. Rolinec Assistant ExaminerErnest F. KarlsenAttorney-F. Shapoe and C. L. Menzemer [5 7] ABSTRACT 1 Claim, 6 DrawingFigures 32 &

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INVENTOR Robert G. Muzur *SMS BY KZW 'W ATTORNEY METHOD FOR DETERMININGEXCESS CARRIER LIFETIME IN SEMICONDUCTOR DEVICES BACKGROUND OF THEINVENTION As is known, the lifetime of excess carriers is a parameter ofmajor importance in semiconductor devices which rely on minority carriereffects for their operation. Although a large number of methods havebeen devised for the measurement of carrier lifetime in devicestructures, it has not always been easy to relate the measured lifetimeto one required for a particular device application, since themeasurement conditions are not necessarily identical with the operatingconditions of the device. Some of the difficulties are attributable togeometrical effects and to the fact that in silicon and germanium,lifetime varies with injection level, so that the lifetime measured atone injection level need not apply to another. The problem isparticularly acute in high powered devices such as the thyristor whichoperates under extremely high injection levels in the forward conductingor ON state. Also, when the device is turned OFF, the decay of carriersthrough recombination covers a range in concentrations of several ordersof magnitude. In the latter case, a knowledge of carrier lifetime ateither high or low injection levels alone is clearly inadequate.

In the past, numerous attempts have been made to obtain reliable excesscarrier lifetime measurements on semiconductor materials. However, mostof these are not altogether satisfactory and are limited primarily touse in the laboratory. That is, they are not readily adaptable toproduction-line techniques. Most of the work that has been done onas-processed silicon has utilized some variation of the junctionrecovery technique which is based on the fact that a semiconductor diodeexhibits a low impedance under reverse bias for some time after removalof an initial forward bias condition due to the storage of excessminority carriers in the P-N junction region. Various prior art reverserecovery techniques measure the quantity of stored charge, which is afunction of lifetime, by either a direct charge measurement or bymeasuring the time between the application of reverse current and therise of junction impedance to the normal reverse bias condition.However, certain inherent defects in these junction recovery techniqueshave prevented their adoption as a standard basic lifetime measurementtechnique. For example, the charge extracted in the reverse biascondition is a function of the magnitude of the forward current and ofthe ratio of reverse to forward current. This effect leads in actualityto the measurement of some time period which is related to the bulklifetime by little understood formulas based on a large number ofassumptions about the current flow situation in the structure beinginvestigated (i.e., the time constant measured in the junction recoverytechniques generally depends on the detailed structure involved throughthe effect of diffusion currents and the like). Finally, the effect ofsurfaces on the diodes used in junction recovery measurements isdifficult to estimate under most conditions, leading to furtheruncertainty in the measured data.

Another method heretofore used to measure excess carrier lifetime is thecarrier decay technique which is based on observing the transientforward voltage decay across a prepared mesa semiconductor diode underopen-circuit conditions, after an essentially instantaneous interruptionof a steady, forward current flow. By observing the voltage decay on anoscilloscope, particularly the slope of the trace produced by thedecaying voltage, the characteristics of the sample being tested can bedetermined, such as carrier lifetime as a function of impurityconcentration.

Like the reverse recovery technique, excess carrier 0 lifetimemeasurements based on the carrier decay technique have been largelylimited to the laboratory, since the techniques used were time-consumingand somewhat complicated for semi-skilled production personnel. Suchprior art techniques ordinarily involved the use of heavily-dopedalloyed or difiused contacts to the sample being tested. This, however,is undesirable, at least for production-line applications, since thehigh temperature associated with the alloying or diffusion process mayhave a deleterious effect on the base lifetime, and because theproduction of such contacts is excessively time-consuming and laborious.Ideally, from the point of view of simplicity, speed and adaptation toproduction-line techniques, pressure contacts for the sample beingtested by carrier decay techniques would be ideal. The difficulty withpressure contacts, however, is that the total electrical contact area ofsuch contacts is always much smaller than the apparent contact area.Consequently, the contact resistance is too high for practicalopen-circuit decay measurements.

SUMMARY OF THE INVENTION As an overall object, the present inventionseeks to provide a new and improved method for measuring excess carrierlifetime in semiconductor bodies by carrier decay techniques, whichmethod is simple and fast and does not require high temperaturetreatment of the semiconductor body.

Another object of the invention is to provide a method for in-lineproduction testing of semiconductor bodies to determine excess carrierlifetime, which method can be readily practiced by semi-skilledpersonnel.

Still another object of the invention is to provide a method fordetermining excess carrier lifetime in semiconductor bodies with the useof ultrasonically soldered contacts which present a low contactresistance and do not require exposure of the semiconductor body to hightemperatures which might otherwise alter the excess carrier measurementsobtained.

In accordance with the invention, a method is provided for determiningexcess carrier lifetime in a semiconductor body of one conductivity typeinto which a region of the opposite conductivity type is initiallydiffused to form a P-N junction. A first contact is ultrasonicallysoldered to a surface of said one region of one conductivity type; asecond contact is ultrasonically soldered to a surface of said region ofthe other about 120 C, far below the temperatures used to produce othertypes of contacts. The ultrasonic wave energy acts to break up oxides onthe surface of the semiconductor body and eliminates the need for hightemperatures and soldering fluxes. Ordinarily, a wafer of semiconductivematerial of one type, say N-type, is

subjected to a diffusion treatment in a furnace whereby the entire outerlayer of the wafer is diffused to form a region of the otherconductivity type, say P-type. Following the diffusion step, one surfaceof the wafer is lapped to expose the N-type material and the lappedsurface covered with a layer of solder, applied by ultrasonictechniques. Following this step, the other side of the wafer, comprisingthe diffused P-type region, has applied thereto an ultrasonicallysoldered contact,

' preferably greater than about 0.3 square centimeter in area tominimize edge effects.

The contacts thus formed are connected to a source of pulses which,through suitable sweep circuitry, actuate the horizontal deflectionplates of a conventional CRT tube. The voltage appearing across thecontacts following application of a pulse is applied to the verticaldeflection plates of the same tube whereby the voltage decay may beobserved on the face of the CRT tube and from this the excess carrierlifetime of the material may be determined.

The above and other objects and features of the invention will becomeapparent from the following detailed description taken in connectionwith the accompanying drawings which form a part of this specifb cation,and in which:

FIG. 1 is an illustration of a semiconductive wafer having diffused intoits surface regions a layer of the opposite conductivity type;

FIG. 2 is an illustration of the wafer of FIG. 1 after having onesurface thereof lapped to expose the inner, undiffused portion of thewafer and form a P-N junction;

' FIG. 3 illustrates the manner in which a soldered contact is appliedto one side of the wafer;

FIG. 4 illustrates the manner in which a soldered contact is applied tothe other side of the wafer;

FIG. 5 is a schematic circuit diagram of suitable circuitry fordetermining excess carrier lifetime utilizing the ultrasonicallysoldered contacts shown in FIGS. 3 and 4; and

FIG. 6 is a view of typical traces showing the voltage decay across theP-N junction of a semiconductor following application of a currentpulse.

With reference now to the drawings, and particularly to FIG. 1, asemiconductive wafer originally of N-type material is disposed within adiffusion furnace and exposed, at high temperatures, to a P-type dopantwhich produces a layer 12 of P-type material entirely around the wafer10. In the manufacture of semiconductor devices, ordinarily a largenumber of the wafers 10 are disposed within a diffusion furnace at thesame time;

and it is desired to determine the excess carrier lifetime of thematerial before proceeding with further processing steps in themanufacture of a transistor or thyristor or other semiconductor device.Otherwise, a deficiency in excess carrier lifetime requirements may notbe discovered until a device has been completely fabricated. in whichcase all of the process steps between the formation of the wafer of FIG.1 and the final product may have been in vain.

The first step of the measurement process following formation of theP-type diffused layer 12 is to lap the underside 14 of the wafer 10 toexpose the inner N-type material. This, then, produces a structure witha single P-N junction between the N-type material or main body of thewafer 10 and the outer P-type layer 12.

The next step in the process is to ultrasonically solder a contact ontothe lapped surface 14. This step is shown in FIG. 3 where the wafer orbody 10 is placed on a hot plate 16 heated by any suitable means, notshown. Preferably, a layer of material, such as paper 18, is disposedbetween the wafer 10 and the hot plate 16 to prevent mechanical damageto the wafer '10 during the ultrasonic soldering operation. Soldermaterial, preferably a 50-50 tin-indium alloy, is deposited on thelapped surface 14 and the hot plate 16 heated to a temperature of aboutC, which is sufficient to melt the solder on the lapped surface 14. Inthis process, the solder spreads out into a layer 20 which is preferablyas large as possible without overlapping onto the P-type layer 12. Theprobe 22 of an ultrasonic transducer is inserted into the layer 20 as itis melted whereby the ultrasonic vibrations will break up any oxides onthe lapped surface 14 and effect an intimate, low resistance contactbetween the metal and the N-typematerial 10. Because of the fact thatthe ultrasonic transducer 22 is employed, it is unnecessary to employany fluxes in the solder 20.

As an alternative to inserting the probe 22 directly into the solder,the hot plate 16, for example, could be contacted by the probe,schematically illustrated at 24, of an ultrasonic transducer whereby thevibrations will be transmitted through the hot plate 16 to the wafer 10and the solder 20. Still another possibility is to bring the probe 24into contact with the body 10 itself.

Following formation of the contact 20, the wafer 10 is turned over asshown in FIG. 4 to expose the surface 26 thereof opposite the lappedsurface 14. An amount of solder, again preferably a 50-50 tin-indiumalloy, is deposited on the surface 26 and the hot plate heated to atemperature of 120 C whereby the solder will melt to form a contact 28.In this process, the probe 22 of an ultrasonic transducer is againintroduced into the solder 28 as it melts in order to break up oxides onthe surface. Preferably, the contact 28, unlike contact 20, isapproximately 0.3 square centimeter in order to maximize current densityduring the open-circuit decay measurement while avoiding edgerecombination effects. It is desirable to maximize measurement currentdensity in order to achieve the highest injected carrier density from agiven current pulse amplitude, which means that the contact area shouldbe as small as possible. Again a paper or the like separator 18 isprovided between the hot plate 16 and the previously-formed contact 20.This separator now serves to prevent lateral flow of the solder as wellas serving as a mechanical cushion. At normal soldering temperatures,the paper will become scorched, but will not burn.

Following formation of the contacts by the process shown in FIGS. 3 and4, the wafer, with the contact 20 on its underside, is placed on anelectrode or plate 30 connected through lead 31 to one side of a pulsingnetwork 32 and to one of the two vertical deflection plates 34 of a CRTtube schematically illustrated at 36. The contact 28, on the other hand,is connected through lead 38 to the other side of the pulsing network 32and to the other vertical deflection plate 40 of the CRT tube 36. Theoutput of the pulsing network is also connected to a sweep circuit 42connected to the horizontal deflection plates 43 and 45 of the CRT tube36. With this arrangement, pulses will be applied across the electrodes20 and 28 by the pulsing network 32. As the trailing edge of each pulsefrom network 32 is reached, it actuates the sweep circuit 42 to causethe electron beam of the CRT tube 36 to sweep across its screen, shownin FIG. 6, from left to right.

A typical trace on the face of the CRT tube is shown in FlG. 6 whereineach of the blocks represents five microseconds. Following the trailingedge of each pulse from pulsing network 32, the electron beam of the CRTtube is caused to move from left to right as viewed in FIG. 6 over atotal period of 50 microseconds, there being ten divisions on the faceof the CRT tube. At the same time, the voltage decay across theelectrodes 20 and 28 following application of a pulse is applied to thevertical deflection plates 40 and 34. This will produce the curves shownin FIG. 6, the upper curve 44 being that obtained when a measurement istaken at a temperature of about 25 C and the lower curve 46 being thatobtained when the measurement is taken at a temperature of about 125 C.Note that in both cases the voltage decays rapidly from an upper valueto a lower value. The slope of the curve 44 or 46, particularly at thestart of the decay, is indicative of the excess carrier lifetime ofthe-material. Thus, by observing the curve on the face of the CRT tube36, excess carrier lifetime can be determined rapidly and efficiently bysemiskilled personnel.

Although the invention has been shown in connec tion with a certainspecific embodiment, it will be readily apparent to those skilled in theart that various changes in method steps and form can be made to suitrequirements without departing from the spirit and scope of theinvention.

I claim as my invention:

1. In the method for determining excess carrier lifetime in asemiconductor body of one conductivity type, the steps of diffusing intosaid body a region of the opposite conductivity type to form a P-Njunction, ultrasonically depositing a mass of metal consisting of analloy consisting of, by weight, 50 percent tin and 50 percent indium,onto opposed surfaces of said body, the body having an opposite typesemiconductivity at said surfaces, heating each of said mass of metal toa temperature not exceeding C while ultrasonically preventing theformation of metal oxides on the surfaces on the metal masses, therebyforming electrical contacts on said surfaces of said regions of opposedconductivity type, and connecting said contacts to a source ofelectrical current pulses whereby the voltage decay following thetermination of each pulse applied across said electrodes is observed onan oscilloscope to determine the excess carrier lifetime in saidsemiconductor body.

1. In the method for determining excess carrier lifetime in asemiconductor body of one conductivity type, the steps of diffusing intosaid body a region of the opposite conductivity type to form a P-Njunction, ultrasonically depositing a mass of metal consisting of analloy consisting of, by weight, 50 percent tin and 50 percent indium,onto opposed surfaces of said body, the body having an opposite typesemiconductivity at said surfaces, heating each of said mass of metal toa temperature not exceeding 120* C while ultrasonically preventing theformation of metal oxides on the surfaces on the metal masses, therebyforming electrical contacts on said surfaces of said regions of opposedconductivity type, and connecting said contacts to a source ofelectrical current pulses whereby the voltage decay following thetermination of each pulse applied across said electrodes is observed onan oscilloscope to determine the excess carrier lifetime in saidsemiconductor body.